Embedded computing products
For FPGA and (soon) ASIC

Summary of Multiple Bus Memory Controller (MBMC)
for HyperBus™️ 2.0 and 1.0, OctaBus™️, Xccela™️ Bus
and JEDEC® xSPI (JESD251) Profile 1.0 and Profile 2.0

Synaptic Laboratories Ltd (SLL) has developed an innovative, up to 200 MHz DDR, unified memory controller that simultaneously supports JEDEC® xSPI (JESD251) Profile 1.0 and Profile 2.0, HyperBus™️, OctaBus™️, and Xccela™️ Bus.

MBMC is employed by our global customers in a broad range of industrial products. 

To request a free trial, please email:  info@synaptic-labs.com

Supports well over 40 different memory device variants:  AP Memory® Xccela™ PSRAM and OctaRAM™️:

For more details, visit the MBMC IP product page.

Summary of HyperBus™️ Memory Controller 1.0 IP (HBMC)

HBMC is available for Intel® FPGA devices and Xilinx® FPGA devices.

Globally, Intel and its channel partners are now promoting HyperBus memories with Synaptic Labs HyperBus Memory Controller (HBMC) for Intel FPGA’s. You can trust this field proven combination that has been developed in partnership between Intel, Cypress®, ISSI® and Synaptic Labs.

Synaptic Labs HBMC IP is now being successfully deployed by industrial consortia and high profile scientific research organisations and universities and Fortune Global 500’s down to the smallest SME’s in commercial and industrial projects and products around the globe, from USA to China. It has passed climatic testing several times.

Detailed product information and free reference designs for HBMC IP will come back online shortly. 

In the interim, please contact SLL on info@synaptic-labs.com for more information on free trials and reference designs.