SLL's embedded software innovation has been recognised by our customers and partners. Major FPGA, memory, and development board makers now officially partner with SLL. This ensures SLL IP is validated on a wide range of physical devices. SLL customers are located in most geographical regions, and include Fortune Global 500's, government agencies, and SME's from USA and Canada to China.
xSPI Multiple Bus Memory Controller (xSPI-MBMC)
The industry ‘defacto standard’ memory controller for xSPI-like memories
Product page for
Octal RAM, Octal Flash and Octal MCP, HyperRAM™ 1.0 (Rev. D) and HyperFlash™ 1.0
SLL is ISSI’s memory controller IP Partner.
SLL Partners and Supported FPGA Vendors for ISSI memory devices
SLL is a Microchip (Microsemi) CompanionCore Partner
SLL is Trenz Electronic’s partner
SLL’s IP supports Xilinx FPGA devices
SLL is ISSI's Partner
Synaptic Laboratories Ltd (SLL) is ISSI’s memory controller Partner for FPGA’s and ASIC. SLL developers are HyperBus, Octal Bus and xSPI memory subject domain experts, supporting ISSI devices since 2016.
SLL is also Partners with Trenz Electronic and other FPGA development board, SOM and evaluation kit vendors (including Intel) that support ISSI memory devices bundled with SLL memory controllers. SLL works closely with our hardware partners and directly with ISSI to ensure SLL’s memory controllers are physically qualified with many ISSI memory device variants. This significantly reduces your project’s risks.
SLL xSPI MBMC IP supports ISSI memory devices on most Intel FPGA’s, on most AMD-Xilinx FPGA’s, and on Microchip PolarFire. SLL is an Intel Partner Alliance Member and Microchip CompanionCore Partner for memory controller and related IP’s.
SLL supports Intel FPGA configuration and fast 8D-8D-8D reuse using ISSI Octal NOR Flash devices.
SLL’s small MBMC IP’s enable you to easily evaluate, select and adopt the benefits of ISSI’s latest memories in your projects and products.
SLL provides world class pre-sales and post-sales technical support for ISSI and all the major memory FPGA vendors, helping you to navigate the rapidly evolving market on the platform of your choice.
Get to market faster, with lower power consumption, lower pin count, lower cost, and far lower project risk, by using SLL’s memory controller in your project/s with ISSI’s memory devices.
SLL supports ISSI field application engineers (FAE) and customers in all regions.
Overview of xSPI MBMC IP support for ISSI memory devices
SLL’s xSPI Multiple Bus Memory Controller (xSPI MBMC) IP supports the following ISSI memories:
- Octal RAM
- Octal RAM with inbuilt ECC
- Octal Flash
- Octal Multi-Chip Package (MCP)
- HyperRAM 1.0 (Revision D dies or higher only)
- HyperRAM 1.0 with inbuilt ECC
- HyperFlash 1.0
- HyperBus Multi-Chip Package (MCP 1.0)
ISSI Octal RAM 1.0 Revision D memories offer good performance with lower hardware and power costs. Octal RAM device variants offer up to 256 Mbit of storage capacity, up to 200 MHz DDR clock speeds, with x8 data path widths in a BGA-24 package size.
ISSI Octal Flash memories offer good performance with lower hardware and power costs. Octal Flash device variants offer up to 2 Gbit of storage capacity, up to 200 MHz DDR clock speeds, with x8 data path widths in a BGA-24 package size.
ISSI Octal Multi-Chip Package (Octal MCP) offers up to 256 Mbit PSRAM and 512 Mbit NOR Flash in one BGBA 24 package.
ISSI HyperRAM 1.0 Revision D memories offer good performance with lower hardware and power costs. HyperRAM device variants offer up to 256 Mbit of storage capacity, up to 200 MHz DDR clock speeds, with x8 data path widths in a BGA-24 package size.
ISSI HyperFlash 1.0 memories offer good performance with lower hardware and power costs. HyperFlash 1.0 device variants offer up to 256 Mbit of storage capacity, up to 166 MHz DDR clock speeds, with x8 data path widths in a BGA-24 package size.
xSPI MBMC support for FPGA and ASIC targets
This memory controller IP has been ported to, and physically tested on, a broad range of FPGA device variants, including:
- Most modern Intel FPGA device families, including:
- Intel MAX 10 – Up to 200 MHz DDR
- Cyclone IV
- Cyclone 10 LP – Up to 200 MHz DDR
- Cyclone 10 GX – Up to 250 MHz DDR
- Cyclone V
- Cyclone V SoC
- Arria 10 – Up to 250 MHz DDR
- Arria 10 SoC – Up to 250 MHz DDR
- Stratix 10 – Up to 250 MHz DDR
- Most modern Xilinx FPGA device families, including:
- Artix-7
- Kintex-7
- Virtex-7
- Zynq 7000
- Kintex Ultrascale+
- Zynq Ultrascale+
- Virtex Ultrascale+ (ideal for supporting ASIC design prototyping in FPGA)
- Microchip (Microsemi)
- PolarFire FPGA – Up to 250 MHz DDR
Other FPGA device families may be available on request. Please contact SLL at info@synaptic-labs.com with details about the specific currently unsupported FPGA device family that you would like to use.
This memory controller IP is also currently being ported from FPGA to standard cell ASIC at up to 250 MHz DDR with x4/x8/x16 datapath support.
xSPI MBMC Trials
To request a trial for selected FPGA device families, please visit here.
xSPI MBMC Capabilities
- Includes tight integration with all the major FPGA vendor’s graphical system integration tools (Platform Designer, Vivado, …)
- Features high quality local interconnect, with support for the following interconnect protocols:
- ARM AMBA AXI4 protocol
- ARM AMBA APB3 protocol
- Intel Avalon-MM protocol
- other interconnect protocols available on request…
- Includes internal clock-crossing circuitry between the local bus interconnect and the external memory channel to reduce circuit area and improve the performance of the customer’s design
- Excellent memory access performance for both latency sensitive and bandwidth intensive applications:
- The round trip time for read memory transfer requests through the memory controller has been optimized for latency sensitive applications, such as processor cores.
- The memory controller supports long burst memory transfer requests over the memory channel to sustain high effective memory bandwidth (>90% efficiency of memory channel)
- Note: SLL offers a range of cache technologies to significantly increase the performance of processor cores that do not have internal instruction and/or data caches when accessing external memories.
- Features low circuit area and low SRAM usages, making SLL’s memory controller viable for use in resource constrained designs.
- Includes optional support for automatic configuration of memory devices at power on:
- FPGA customers typically use the automatic configuration option
- This dramatically simplifies integration of SLL’s memory controller in customer designs, enabling all firmware to be executed in place from x8 NOR Flash.
- Include support for manual configuration of the memory controller and any attached memory devices
- ASIC customers typically use the manual configuration option
- ASIC customers can prototype their designs in FPGA with manual configuration option enabled
- Supports x4, x8 and x16 data path width in a single instantiation of SLL’s memory controller IP
- Supports 2 or more instantiations of the memory controller IP in one project
- Preliminary support for splitting AXI4 requests across 2 instances of the memory controller in parallel to double memory bandwidth is now available
xSPI MBMC markets, applications and use cases
Customers include industrial consortia, high profile government scientific organisations, universities, Fortune Global 500’s down to SME’s around the globe, from USA to China. Applications include commercial and industrial projects and products, such as: Sensors, video, industrial automation, medical, transport, photonics, … Use cases include: eXecution in Place (XiP) of software, long burst DMA access, video frame buffering, packet buffering, …
xSPI MBMC support for ISSI memory devices
SLL’s memory controller supports, and is physically qualified with, a broad range of ISSI memory device variants:
- ISSI x8 Octal RAM
- ISSI x8 Octal RAM with in built ECC
- ISSI x8 Octal Flash
- ISSI x8 Octal MCP (Octal RAM + Octal Flash in one package)
- ISSI x8 HyperRAM 1.0 (Revision D dies or higher only)
- ISSI x8 HyperRAM 1.0 with in built ECC
- ISSI x8 HyperFlash 1.0
ISSI’s Octal RAM and HyperRAM are low power replacements for SDR, LPSDR, DDR and CellularRAM.
xSPI MBMC v3 support for ISSI HyperFlash 1.0
Status of ISSI HyperFlash 1.0 device testing and qualification performed by SLL:
- Integrated Silicon Solution Inc. (ISSI) – HyperFlash 1.0
- Physically validated:
- IS26KS256S (256 Mbit, 1.8V)
- IS26KS512S (512 Mbit, 1.8V)
- Validated in the simulator:
- Pending…
- Physically validated:
xSPI MBMC support for ISSI Octal RAM
Status of ISSI Octal RAM device testing and qualification performed by SLL:
- Integrated Silicon Solution Inc. (ISSI) – Octal RAM:
- Physical validation in process on Trenz board:
- IS66WVO16M8DALL-200BLI (128 Mbit, 1.8V)
- IS66WVO16M8DBLL-100BLI (128 Mbit, 3V)
- IS66WVO16M8DBLL-133BLI (128 Mbit, 3V)
- IS66WVO16M8EDALL-166BLI (128 Mbit, 1.8V, with ECC)
- IS66WVO16M8EDBLL-133BLI (128 Mbit, 3V, with ECC)
- IS66WVO32M8DALL-200BLI (256 Mbit, 1.8V)
- IS66WVO32M8DBLL-133BLI (256 Mbit, 3V)
- IS72WVO32M8AWO256-200HLA2 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 1.8V)
- IS72WVO32M8BLO256-133HLA2 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 3V)
- Support planned:
- IS67WVO16M8DALL
- IS67WVO16M8DBLL
- IS67WVO16M8EDALL (with ECC)
- IS67WVO16M8EDBLL (with ECC)
- IS67WVO32M8DALL
- IS67WVO32M8DBLL
- Physical validation in process on Trenz board:
xSPI MBMC support for ISSI Octal Flash
Status of ISSI Octal Flash device testing and qualification performed by SLL:
- Integrated Silicon Solution Inc. (ISSI) – Octal Flash
- Physical validation in process on Trenz board:
- IS25LX256-JHLE (256 Mbit, 3V)
- IS25WX256-JHLE (256 Mbit, 1.8V)
- IS72WVO32M8AWO256-200HLA2 (256 Mbit Octal Flash, 64 Mbit Octal RAM, 1.8V)
- IS72WVO32M8BLO256-133HLA2 (256 Mbit Octal Flash, 64 Mbit Octal RAM, 3V)
- Support planned:
- IS25LX064
- IS25WX064
- IS25LX128
- IS25WX128
- IS25WX256
- IS25LX512M
- IS25WX512M
- Physical validation in process on Trenz board:
xSPI MBMC support for ISSI Octal MCP
Status of ISSI Octal RAM device testing and qualification performed by SLL:
- Integrated Silicon Solution Inc. (ISSI) – Octal MCP:
- Physical validation in process on Trenz board:
- IS72WVO32M8AWO256-200HLA2 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 1.8V)
- IS72WVO32M8BLO256-133HLA2 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 3V)
- Physical validation in process on Trenz board:
xSPI MBMC v3 support for ISSI HyperRAM 1.0
SLL’s Memory Controller is compatible with all HyperRAM 1.0 memory devices from ISSI. ISSI recommends customers always use the latest die Revision (currently Rev. D) of their HyperRAM product family.
Status of ISSI HyperRAM 1.0 memory device testing and qualification performed by SLL:
- Integrated Silicon Solution Inc. (ISSI) – HyperRAM 1.0
- Physically validated:
- IS66WVH8M8ALL-166 (x8, 64 Mbit, single die, 1.8V) – Not Recommended for new designs
- IS66WVH8M8DBLL-100 (x8, 64 Mbit, single die 3.0V) – Revision D Die
- Physical validation in process on Trenz board:
- IS66WVH16M8DALL-166A1LI (128 Mbit, single die, 1.8V) – Revision D Die
- IS66WVH16M8DBLL-100B1LI (128 Megabit, single die, 3.0V) – Revision D Die
- IS66WVH32M8DALL-166B1LI (256 Megabit, single die, 1.8V) – Revision D Die
- IS66WVH32M8DBLL-100B1LI (256 Megabit, single die, 3.0V) – Revision D Die
- Provisional support available on customer demand for Revision D dies
- IS66WVH16M8EDALL (128 Megabit, single die, 1.8V, Internal ECC)
- IS66WVH16M8EDBLL (128 Megabit, single die, 3.0V, Internal ECC)
- IS67WVH8M8DALL ( 64 Megabit, single die, 1.8V)
- IS67WVH8M8DBLL ( 64 Megabit, single die, 3.0V)
- IS67WVH16M8DALL (128 Megabit, single die, 1.8V)
- IS67WVH16M8DBLL (128 Megabit, single die, 3.0V)
- IS67WVH32M8DBLL (256 Megabit, single die, 3.0V)
- IS67WVH16M8EDALL (128 Megabit, single die, 1.8V, Internal ECC)
- IS67WVH16M8EDBLL (128 Megabit, single die, 3.0V, Internal ECC)
- Legacy devices
- IS66WVH8M8ALL/BLL (ISSI recommends all customers migrate to the supported newer single die IS66WVH8M8DALL/BLL)
- IS66WVH16M8ALL-166 (128 Mbit, dual die, 1.8V)
- ISSI 1643 IS66WVH16M8ALL-166B1LI N508 BNB589580YC
- ISSI 1806 IS66WVH16M8ALL-166B1L1 N508 BNN984000Y3
- ISSI 1938 IS66WVH16M8ALL-166B1LI N508 BNN984000Y3
- ISSI 1938 IS66WVH16M8ALL-166B1LI N508 BRN572000Y1
- IS66WVH16M8BLL-100 (128 Mbit, dual die, 3.0V)
- IS66WVH16M8ALL-166 (128 Mbit, dual die, 1.8V)
- IS67WVH8M8ALL/BLL (ISSI recommends all customers migrate to the supported newer single die IS67WVH8M8DALL/BLL)
- IS67WVH16M8ALL-166 (128 Mbit, dual die, 1.8V)
- IS67WVH16M8BLL-100 (128 Mbit, dual die, 3.0V)
- IS66WVH8M8ALL/BLL (ISSI recommends all customers migrate to the supported newer single die IS66WVH8M8DALL/BLL)
- Physically validated:
xSPI MBMC support for Commercial-off-the-shelf (COTS) boards
SLL has the broadest range of xSPI and xSPI-like board partners in this memory controller market. SLL has also tested our memory controller on the broadest range of COTS and proprietary boards in the market.
SLL leverages our close relationships to deliver known-working reference designs with trial copies of xSPI MBMC (that do not expire) to: (a) reduce your project risk; and (b) get you to market faster. SLL’s board partners include:
- Trenz Electronic GmbH
- Aries Embedded GmbH
- Devboards GmbH
- Intel Corporation (Intel PSG)
- Microsemi Corporation a wholly owned subsidiary of Microchip Technology Inc. (Microsemi)
SLL has also run our memory controller IP on boards from other board vendors such as:
Notice to Hardware Developers using xSPI MBMC
- Please validate your pin-mapping and PCB Layout for you selected memory devices with Synaptic Laboratories at info@synaptic-labs.com before manufacturing your first prototype to reduce risks.
- Please email info@synaptic-labs.com for SLL’s guidance with regard to supporting specific FPGA device families.
ISSI Octal RAM Resources
- Integrated Silicon Solution Inc. (ISSI)
- Standards
- Macronix OctaBus
- Application notes and other guidance:
- Data sheets
- IS66WVO
- IS66WVO8M8DALL ( 64 Mbit, single die, 1.8V)
- IS66WVO8M8DBLL ( 64 Mbit, single die, 3V)
- IS66WVO8M8EDALL ( 64 Mbit, single die, 1.8V, with ECC)
- IS66WVO8M8EDBLL ( 64 Mbit, single die, 3V, with ECC)
- IS66WVO16M8DALL ( 128 Mbit, single die, 1.8V)
- IS66WVO16M8DBLL ( 128 Mbit, single die, 3V)
- IS66WVO16M8EDALL ( 128 Mbit, single die, 1.8V, with ECC)
- IS66WVO16M8EDBLL ( 128 Mbit, single die, 3V, with ECC)
- IS66WVO32M8DALL ( 256 Mbit, single die, 1.8V)
- IS66WVO32M8DBLL ( 256 Mbit, single die, 3V)
- IS66WVO
ISSI Octal Flash Resources
- Integrated Silicon Solution Inc. (ISSI)
- Standards
- Macronix OctaBus
- JEDEC JESD251 – EXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, Version 1.0
- JEDEC JESD216D – Serial Flash Discoverable Parameters (SFDP)
- JEDEC JESD252 – Serial Flash Reset Signaling Protocol
- Application notes and other guidance:
- Data sheets:
- IS25LX
- IS25LX064 ( 64 Mbit, 3V)
- IS25LX128 ( 128 Mbit, 3V)
- IS25LX256 ( 256 Mbit, 3V)
- IS25LX512M ( 512 Mbit, 3V)
- IS25WX
- IS25WX064 ( 64 Mbit, 1.8V)
- IS25WX128 ( 128 Mbit, 1.8V)
- IS25WX256 ( 256 Mbit, 1.8V)
- IS25WX512M ( 512 Mbit, 1.8V)
- IS25LX
ISSI Octal MCP Resources
- Integrated Silicon Solution Inc. (ISSI)
- Standards
- Macronix OctaBus for PSRAM
- Micron Xccela Bus for NOR Flash (JEDEC xSPI Profile 1.0)
- JEDEC JESD251 – EXpanded Serial Peripheral Interface (xSPI) for Non Volatile Memory Devices, Version 1.0
- JEDEC JESD216D – Serial Flash Discoverable Parameters (SFDP)
- JEDEC JESD252 – Serial Flash Reset Signaling Protocol
- Application notes and other guidance:
- Data sheet
- Contact ISSI for datasheets:
- IS72WVO
- IS72WVO16M8AWO256 (128 Mbit Octal Flash, 256 Mbit Octal RAM, 1.8V)
- IS72WVO16M8BLO256 (128 Mbit Octal Flash, 256 Mbit Octal RAM, 3V)
- IS72WVO16M8AWO512 (128 Mbit Octal Flash, 512 Mbit Octal RAM, 1.8V)
- IS72WVO16M8BLO512 (128 Mbit Octal Flash, 512 Mbit Octal RAM, 3V)
- IS72WVO32M8AWO256 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 1.8V)
- IS72WVO32M8BLO256 (256 Mbit Octal Flash, 256 Mbit Octal RAM, 3V)
- IS72WVO32M8AWO512 (256 Mbit Octal Flash, 512 Mbit Octal RAM, 1.8V)
- IS72WVO32M8BLO512 (256 Mbit Octal Flash, 512 Mbit Octal RAM, 3V)
- IS72WVO
- Contact ISSI for datasheets:
ISSI HyperRAM 1.0 Resources
- Integrated Silicon Solution Inc. (ISSI)
- Standards
- Application notes and other guidance:
- Cypress AN211622 – HyperFlash and HyperRAM Layout Guide
- Discusses the layout considerations when placing a Cypress HyperFlash or HyperRAM device on a PCB.
- Cypress AN211622 – HyperFlash and HyperRAM Layout Guide
- Data sheets:
- IS66WVH
- IS66WVH8M8ALL ( 64 Mbit, single die, 3V) — Not recommended for new designs
- IS66WVH8M8BLL ( 64 Mbit, single die, 1.8V) — Not recommended for new designs
- IS66WVH8M8DALL ( 64 Mbit, single die, 3V)
- IS66WVH8M8DBLL ( 64 Mbit, single die, 1.8V)
- IS66WVH8M8EDALL ( 64 Mbit, single die, 1.8V, Internal ECC)
- IS66WVH8M8EDBLL ( 64 Mbit, single die, 3V, Internal ECC)
- IS66WVH16M8DALL (128 Mbit, dual die, 1.8V) — Not recommended for new designs
- IS66WVH16M8DBLL (128 Mbit, dual die, 3V) — Not recommended for new designs
- IS66WVH16M8DBLL (128 Mbit, single die, 1.8V)
- IS66WVH16M8DBLL (128 Mbit, single die, 3V)
- IS66WVH16M8EDALL (128 Mbit, single die, 1.8V, Internal ECC)
- IS66WVH16M8EDBLL (128 Mbit, single die, 3V, Internal ECC)
- IS66WVH32M8DALL (256 Megabit, single die, 1.8V)
- IS66WVH32M8DBLL (256 Megabit, single die, 3.0V)
- IS67WVH
- IS67WVH8M8ALL ( 64 Mbit, single die, 3V) — Not recommended for new designs
- IS67WVH8M8BLL ( 64 Mbit, single die, 1.8V) — Not recommended for new designs
- IS67WVH8M8DALL ( 64 Mbit, single die, 3V)
- IS67WVH8M8DBLL ( 64 Mbit, single die, 1.8V)
- IS67WVH8M8EDALL ( 64 Mbit, single die, 1.8V, Internal ECC)
- IS67WVH8M8EDBLL ( 64 Mbit, single die, 3V, Internal ECC)
- IS67WVH16M8DALL (128 Mbit, dual die, 1.8V) — Not recommended for new designs
- IS67WVH16M8DBLL (128 Mbit, dual die, 3V) — Not recommended for new designs
- IS67WVH16M8DBLL (128 Mbit, single die, 1.8V)
- IS67WVH16M8DBLL (128 Mbit, single die, 3V)
- IS67WVH16M8EDALL (128 Mbit, single die, 1.8V, Internal ECC)
- IS67WVH16M8EDBLL (128 Mbit, single die, 3V, Internal ECC)
- IS67WVH32M8DALL (256 Megabit, single die, 1.8V)
- IS67WVH32M8DBLL (256 Megabit, single die, 3.0V)
- IS66WVH
ISSI HyperFlash 1.0 Resources
- Integrated Silicon Solution Inc. (ISSI)
- Standards
- Application notes and other guidance:
- Cypress AN211622 – HyperFlash and HyperRAM Layout Guide
- Discusses the layout considerations when placing a Cypress HyperFlash or HyperRAM device on a PCB.
- Cypress AN211622 – HyperFlash and HyperRAM Layout Guide
- Data sheets:
- IS26KL
- IS26KL128S ( 128 bit, 3V)
- IS26KL256S ( 256 bit, 3V)
- IS27KS
- IS26KS128S ( 128 bit, 1.8V)
- IS26KS256S (256 bit, 1.8V)
- IS26KL
Contact SLL for information on many development board options for all these memory vendors xSPI memory devices: info@synaptic-labs.com