SLL's embedded software innovation has been recognised by our customers and partners. Major FPGA, memory, and development board makers now officially partner with SLL. This ensures SLL IP is validated on a wide range of physical devices. SLL customers are located in most geographical regions, and include Fortune Global 500's, government agencies, and SME's from USA and Canada to China.
About Synaptic Laboratories Ltd (SLL)
COTS semiconductor IP (SIP) for many embedded applications in FPGA and ASIC hardware. ⭐ Patents awarded in many countries
Leading FPGA and memory vendors choose SLL to be their semiconductor IP provider partner
Fortune Global 500’s, SME’s, research institutions… globally
SLL supports our partners’ FAE and electronics distribution companies FAE in all regions
⚡ IP design house ⚡ Project design guidance ⚡ FPGA design shrink and optimization ⭐ Excellent customer support
WORLD’S FASTEST NON-VOLATILE xSPI MEMORY
3 MAY 2022
EVERSPIN PRESS RELEASE
As a Partner of Everspin, SLL was honoured to provide some content for Everspin’s official press announcement of their new STT-MRAM EMxxLX xSPI Family of Products. Everspin uses SLL’s xSPI MBMC IP.
Industrial demonstrators with STT-MRAM and SLL’s xSPI MBMC IP will be on display at Embedded World 2022.
EMBEDDED WORLD 2022
THE TRADE FAIR FOR EMBEDDED TECHNOLOGIES
21-23 JUNE, 2022
Thank you to all our Partners for making Embedded World 22 in Germany a great success.
xSPI FPGA Configuration
with Fast Re-Use
Product code: Boot with Fast Re-use
Replace your slow SPI or QSPI flash with a faster or better FPGA fabric configuration device.
This solution employs SLL’s xSPI Multiple Bus Memory Controller (xSPI MBMC).
xSPI MBMC allows you to select from a wide range of low pin count, faster, or better, configuration devices:
- 200 MHz DDR x8 xSPI NOR Flash devices from
Infineon, ISSI, Gigadevice, Macronix and Micron
- Exciting 200 MHz DDR x8 STT-MRAM from Everspin
(Nonvolatile memory with PSRAM like performance)
- 200 MHz DDR x8 Multi-Chip Packages
(NOR Flash and PSRAM on the same ~12 I/O pins)
This exciting solution will deliver:
- Far superior memory bandwidth after FPGA fabric configuration
- Potential to reduce the number of devices and board area in your design
Easy to evaluate on COTS development boards from SLL hardware partners with SLL free trial IP.
xSPI Multiple Bus Memory Controller
The industry 'defacto standard' memory controller for xSPI-like memories
Product code: xSPI MBMC v3.3.x
One very small memory controller for FPGA and ASIC that supports:
- NOR Flash, PSRAM (with ECC), exciting xSPI STT-MRAM
- JEDEC xSPI Profile 1.0 & 2.0
- HyperBus 1.0, 2.0 & 3.0
- OctaBus, Octal Bus
- Xccela Bus
- All the 9 memory vendors making these devices
- Up to 250 MHz DDR, with x4, x8 and x16 data paths
- HyperBus and Octal Bus 200 MHz DDR x8 Multi-Chip Packages (MCP)(NOR Flash and PSRAM on the same ~12 I/O pins)
- Multiple package sizes, from tiny WLSCP, 4mm x 4mm BGA49, 6mm x8mm BGA24, 8mm x 8mm BGA24, 6mm x 8mm BGA 24 MCP and 8mm x 8mm BGA 24 MCP
- Support for many FPGA device families
- Low cost COTS evaluation boards are available with SLL free trial IP
xSPI MBMC IP is physically validated on many memories in partnerships and collaboration with the 9 memory vendors. Also with SLL’s FPGA and hardware development board partners.
Chip To Chip Communications
Product code: Chip to Chip Communications
Fast and efficient bidirectional chip to chip communications
over Octa, Octal and xSPI Profile 2.0 PSRAM protocols
⚡ High bandwidth
⚡ Low latency
Tightly coupled BIDIRECTIONAL communications between:
- Your chosen ASIC microcontroller unit (MCU) ↔︎ your chosen FPGA
- Your chosen ASIC microprocessor unit (MPU) ↔︎ your chosen FPGA
- Your chosen FPGA’s: FPGA ↔︎ FPGA
Suitable for use with all MCU that have HyperBus compatible memory controllers.
HyperBus 1.0 Memory Controller
Product code: HBMC v3.1.x
Intel bundles SLL’s HBMC IP with their Cyclone 10 LP Evaluation Kit.
This very small IP is a legacy solution that supports the original HyperBus Generation 1.0 devices – HyperRAM, HyperFlash and HyperMCP (Multi-Chip Package) – sold by Cypress (now Infineon) and ISSI.
Today the HBMC IP is superseded by SLL’s superior xSPI Multiple Bus Memory Controller (xSPI MBMC). Request an updated MBMC IP free trial online here.
It is very easy for Cyclone 10 LP Evaluation Kit and SLL HBMC IP customers to transition to SLL’s xSPI MBMC IP (v3.3.x). Guidance is provided.
Memory Management and
Memory Protection Solutions
Product code: eMMU eMPU
Significant advances for MMU’s and MPU’s in embedded applications:
- Tiny footprint solution for very resource constrained designs
- Exceptional real-time memory management capabilities for processors and peripherals
- Patents awarded USA, South Korea, …
- The best features and capabilities of both a memory protection unit (MPU) and
a memory management unit (MMU) in one tiny module.
Breakthrough Safe and Secure
Real Time Architecture
Product code: SSRT
Multi-core and many-core SSRT features:
- support for all real-time operating systems
- processor agnostic
- statically time analyzable
- improves use of all alternate timing analysis approaches
- simplifies writing real-time software
- higher performance
- and more (patents awarded)
SLL Partners and Supported Vendors
SLL commercial customers include Fortune Global 500’s, government agencies, scientific organizations and institutes, and
SME’s from North America, across the EU and EFTA countries, and to Japan and China.
Some examples include:
- Caterpillar subsidiary Progress Rail (USA)
- Raytheon Technologies Group subsidiary Collins Aerospace (USA)
- Microchip (USA)
- TRIUMF (Canada)
- SICK AG (Germany)
- Osram (Italy)
- Accelink (China)
- Hamamatsu Photonics (Japan)
SLL also works with third party design houses that are working as subcontractors on commercial and government contracts
SLL also works with the FAE of SLL partner companies and with the FAE of their electronics distribution companies (Arrow, Digi-Key, Macnica and others) in all regions and with their end customers.
SLL IP's Applications
Customers can easily use SLL solutions on COTS and proprietary development boards. All major FPGA vendors' devices are supported:
Free Trial and Reference Designs
SLL provides free trials with reference designs for several of our IP’s.
SLL reference designs have been downloaded thousands of times.